Intrinsic evolvable hardware for combinatorial synthesis based on SoC+FPGA and GPU platforms

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dc.contributor.authorCamargo Bareño, Carlos
dc.contributor.authorPedraza Bonilla, Cesar
dc.contributor.authorNiño, Luis Fernando
dc.contributor.authorMartinez Torre, Jose
dc.coverage.campusCRAI-USTA Bogotáspa
dc.date.accessioned2020-01-22T17:50:12Z
dc.date.available2020-01-22T17:50:12Z
dc.date.issued2011-07
dc.description.abstractThis paper presents a novel a parallel genetic programming (PGP) boolean synthesis implementation on a low cost cluster of an embedded open platform called SIE. Some tasks of the PGP have been accelerated through a hardware coprocessor called FCU, that allows to evaluate individuals onchip as intrinsic evolution. Results have been compared with GPU and HPC implementations, resulting in speedup values up to approximately 2 and 180 respectivelyspa
dc.description.domainhttp://unidadinvestigacion.usta.edu.cospa
dc.format.mimetypeapplication/pdfspa
dc.identifier.doihttps://doi.org/10.1145/2001858.2001964spa
dc.identifier.urihttp://hdl.handle.net/11634/21034
dc.relation.referencesA Aguirre, C Coello, and B Buckles. A genetic programming approach to logic function synthesis by means of multiplexers. Proc. of the I NASA/DoD Workshop on Evolvable hardware., pages 46 – 53, 1999.spa
dc.relation.referencesC. Camargo. Hardware copyleft como Herramienta para la Ense˜nanza de Sistemas Embebidos. Congreso Argentino de Sistemas Embebidos CASE 2011, Buenos Aires Argentina, March 2011.spa
dc.relation.referencesC. Camargo. Metodolog´ıa Para la Transferencia Tecnol´ogica en la Industria Electr´onica Basada en Software Libre y Hardware Copyleft. XVII Workshop de Iberchip, Bogot´a Colombia, February 2011.spa
dc.relation.referencesCAC Coello, RL Zavala, and BM Garcia. Ant colony system for the design of combinational logic circuits. Lecture Notes in Computer Science, pages 21–30, 2000. [5] I Kajitani, T Hoshino, M Iwata, and T Higuchi.spa
dc.relation.referencesI Kajitani, T Hoshino, M Iwata, and T Higuchi. Variable length chromosome ga for evolvable hardware. Evolutionary Computation, pages 443 – 447, Jan 1996.spa
dc.rightsAtribución-NoComercial-CompartirIgual 2.5 Colombia*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-sa/2.5/co/*
dc.subject.keywordHardware copyleftspa
dc.subject.keywordEvolutionaryspa
dc.subject.keywordBoolean synthesisspa
dc.titleIntrinsic evolvable hardware for combinatorial synthesis based on SoC+FPGA and GPU platformsspa
dc.type.categoryGeneración de Nuevo Conocimiento: Artículos publicados en revistas especializadas - Electrónicosspa

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